The invention relates to a stage tracer used in an information processor to obtain information about errors occurring in the information processor.
The stage tracer stores the intermittent or solid changes in the internal signals of the information processor, i.e. the signals indicating the instantaneous operating conditions of the registers and the controlling flip-flop in the information processor, in a memory. When an abnormal phenomenon such as an error happens, the stage tracer stops the writing operation in the memory and then provides error information useful in analyzing causes of errors by delivering the content of the memory.
In a conventional stage tracer, the internal signals (i.e. signals to be observed) appearing at the various points in the information processor are transferred through signal lines from their source points to the memory. Namely, only one memory is provided in a suitable position in the information processor and all the internal signals are gathered and stored in the memory. In general, the memory should preferably have a capacity of several hundred words (about several hundred bits/word).
The conventional stage tracer of this type, however, can not be free from the following problems and therefore remains to be improved.
Namely, the number of the signal lines for transmitting internal signals from the flip-flops or the selected registers in the packages to the common memory must be equal to the number of the internal signals themselves, i.e. as many as more than several hundreds. Also, more than several hundred connector pins are needed for signal lines in the packages so that the assembly process and wiring process become complicated, the resulting product being disadvantageous from the standpoint of cost. Moreover, the signal lines to be used must be rather long. Accordingly, the signals tend to be attenuated or noises are apt to be mixed into the signals. To prevent these tendencies, the signals must be passed through gates, which serve as amplifiers, before being sent through the signal lines. Furthermore, the lengths of the signal lines vary depending upon the respective internal signals, i.e. the positions of the packages from which the internal signals are taken out, and therefore the internal signals indicative of the operating conditions of registers and flip-flops at the same time point reach the memory at different instants so that an exact record of internal signals is impossible. Consequently, some measures should be taken to provide phase-controlling flip-flops for the respective internal signals so as to be able to write all the internal signals in the memory simultaneously. Thus, the conventional stage tracer, which needs amplifying gates and flip-flops, incurs an increase in the cost associated with the transmission of the internal signals. Moreover, since the internal signals are transferred through long signal lines, it often happens that the waveforms of the internal signals are distorted and that an exact record of the internal signal becomes impossible. This means that errors cannot be correctly recorded and therefore that the causes of the errors cannot be properly analyzed.
FIG. 1 schematically shows a conventional stage tracer as described above.
In FIG. 1, an internal signal (1) sent from a register or a control flip-flop provided in a package 7 mounted on a mother board 13, is further sent through a timing phase controlling flip-flop 1 and an amplifying gate 2 and then taken in a cable package 8 provided on the board 13. The internal signal (1) is then transmitted through a signal line (i.e. cable) 16 to a cable package 9 mounted on a board 14 and further to a memory package 10 mounted on the board 14. A series of internal signals thus taken in the memory package 10 are simultaneously set in a write data register (hereinafter referred to write register) 4 and then written in a common memory 5. On the other hand, an internal signal (2) in a package 11 mounted on a board 15 is in phase with the setting timing of the register 4 and therefore a phase control flip-flop need not be provided. The internal signal (2) is taken out of the package 11 via an amplifying gate 6, sent through a cable 17 connecting a cable package 12 with the cable package 9 to the memory package 10, and written in the memory 5 through the write register 4. Other internal signals from the packages 7 and 11 and from packages not shown are written in the memory 5 in like manner. Now, a reference numeral 18 designates a connecter pin.